COSMOS: a compositional design-space exploration methodology for hardware accelerators

Our paper "COSMOS: Coordination of High-Level Synthesis and Memory Optimization for Hardware Accelerators" has been published in ACM Transactions on Embedded Computing Systems (TECS). The paper is available here. The paper has been presented at the ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS). The slides of the presentation are available here.

The paper describes COSMOS, an automatic methodology for the design-space exploration of complex hardware accelerators. COSMOS coordinates both high-level synthesis and memory optimization tools in a compositional way. Thanks to the co-design of datapath and memory, COSMOS produces a large set of Pareto-optimal implementations for each component of a given accelerator. Additionally, COSMOS leverages compositional design techniques to quickly converge to the desired trade-off point between cost and performance for the entire accelerator architecture.

-- 12 Nov 2017