We announce the release of ESP, our RISC-V based platform for the seamless design of heterogeneous SoCs.

ESP is an open-source research platform for the design of heterogeneous system-on-chip. The platform combines an architecture and a methodology. The flexible tile-based architecture simplifies the integration of heterogeneous components by balancing regularity and specialization. The companion methodology raises the level of abstraction to system-level design, thus promoting closer collaboration among software programmers and hardware engineers.